This invention relates generally to a test head structure for test and burn-in of a plurality of semiconductor chips on a wafer and a method for forming a test head structure, and more particularly to such a test head structure and method of forming in which the wafer support member comprises a plurality of ceramic tiles.
Semiconductor chips are typically formed as parts of a large wafer which, after formation, may contain several hundred, or even thousands, of individual semiconductor chips. Each of the individual chips must be tested to determine its operational characteristics and assure that it meets certain desired performance criteria. Heretofore it has been very difficult to test a full wafer due to the difficulty of contacting every test point on the entire wafer. The contacting system must be extremely flat, have perfect alignment with all of the wafer contacts, and have a thermal coefficient of expansion that is matched to the wafer. Furthermore, the contacting system must have wiring and input/output (I/O) capability for power and signals. Heretofore, a silicon wafer, such as the single-piece wafer described in commonly assigned U.S. Pat. No. 5,600,257, entitled SEMI-CONDUCTOR WAFER TEST AND BURN-IN, has been used as a platform for supporting a fabricated wafer. However, such wafers are limited in their mechanical properties and power transmission capability. Also, it is difficult and expensive to provide large area, single surface support platforms having the required electrical interconnect features capable of simultaneously testing all of the components on a large wafer.
An alternative solution to identifying and grading the various components of a wafer, typically referred to as identifying "known good die," includes processing the wafer through a dice-and-cut operation wherein the wafer is cut into its individual components, and the separated components mounted onto a test and/or burn-in board for subsequent performance testing. However, this operation is very time consuming, since each chip or die must be separately mounted, tested, identified, and sorted.
It is therefore desirable to have a suitable platform for test and burn-in in which a large wafer, for example a wafer having a diameter of up to 12 inches, can be fully supported. It is also desirable to have a suitable platform for wafer test and burn-in in which the support system for the wafer has a thermal coefficient of expansion substantially equal to that of the wafer, and is capable of simultaneously delivering test signals to the full wafer as well as provide power to each component of the wafer during burn-in. It is also desirable to have a method for forming such a test head structure that avoids the need to provide a large, single-member support surface for the full wafer.